Performance Study and Synthesis of the New LDPC Error Correcting Code Using the Bit-Flipping Algorithm

The discovery in 1993 of the turbo codes Berrou C., A. and P. Glavieux Thitimajshima at the International Conference of Communication Florida has revolutionized communication. This innovation made it possible to rediscovery the error correcting codes invented by Robert Gallager in 1963 and rediscovered by Mackay in 1995, currently called Low Density Parity Check (LDPC). This code is one of the error correction codes introduced by the transmission channel that have the fastest and most effective level of protection and correction of the information transmitted during the communication. This code has been almost generalized in communication standards such as satellites. The objective of our article is to minimize the number of iterations and in some cases completely remove the iteration produced by the LDPC code bit flipping algorithm. The result of this algorithm, if we take for example the LDPC code (n, k), the number of possible syndromes which we can find is 2k-1 and for each syndrome different from zero, we can do almost four iterations to correct the errors, which gives 4x(2k-1) iterations in totality. On the other hand, the proposed algorithm removes the iteration for k syndromes and reduces iterations for the rest of the cases from four to two iterations. This study of the new design gave more performance results and the results of the simulation below according to a hardware description language used in digital electronics using quartus software tools show the importance of this algorithm.


Introduction
In 1948 by information theory beginning with the founding article of Claude Shannon [1] in the Bell System Technical Journal. Shannon's theory is based on the research bases that established in 1928 by H. Nyquist and R.V. Hartley. This article by Shannon showed the existence of a limit to the flow of information transmitted by the presence of disturbance noise, but Shannon did not explain the means of approaching so the theory remains inapplicable at this time. This information theory has now become indispensable in the design of any telecommunication system. The reason behind the motivation of the scientific community's research in the field correctors of errors, come mainly from the strong demand in the industrial telecommunication market and the strong use of electronic material like Mobile Phone, Tablet, GPS, Smart Grid, and different categories equipment, the overall health, etc. The different data exchange services require at all times reliability, performance and quality in the transmission of information. So the decoding coding tool and in particular the LDPC code (low density parity check) invented by Robber Gallager in 1962 [2] then rediscovered by Mackay in 1995 [3], currently used into some modern applications such as 10GBase-T Ethernet, Wi-Fi, WiMAX, Digital Video Broadcasting (DVB) [5]. The turbo-codes invented by C. Berrou, A. Glavieux, and P. Thitimajshima in 1993 [4]. To meet these needs, the two LDPC codes and Turbo code contribute in an essential way to the transmission level, the transmission channel and the final user. The objective of our article is to study the new decoding design proposed LDPC code and to make the simulation by the VHDL language, in order to decode the information quickly and without iteration compared to the basic bit flipping decoding algorithm used today in several communication standards. First, we entered the parity control equations in a table that gives all possible syndromes. Secondly, we can locate the wrong bit from these syndromes. Third, we will use the simulation of this proposed algorithm before and after error correction.

Related Works
The Bit-Flipping algorithme currently used is based on the exchange of the number of parity failures when a bit of the received sequence is toggled. This is a control operation performed by the parity nodes on the received bits of the variable nodes, called the iterative decoding algorithm [2,6,7]. The decoder each time calculates all parity sums and then it changes each bit in the received sequence if it is part of the failed parity equations. From the modified sequence, the decoder recalculates the parity sums and the process is repeated until all parity sums are zero [8]. The number of iterations of the decoding is unstable and depends on the signal-to-noise ratio of the channel. This method requires a little more circuit complexity, but it gives better error performance than other methods. The bit flipping algorithm consists of four essential steps.

Four Various Steps
Step 1: calculation of the syndromes: S= Hr T If S =0 the algorithm ends, so the received vector is a valid codeword, which can be decoded into a useful message, otherwise, go to the next step; Step 2: determine for each of the N bits received the number of error parity equation: {f 1 f 2 …f N }; Step 3: determine the set S of the received bits for which a maximum of error parity equations are obtained: max {f 1 f 2 …f N }; Step 4: to toggle the set of received bits in S and return to the first step (calculates of syndrome)

Explanatory Examples
By bit flipping decoding of an LDPC code: The parity matrix H of an LDPC code of length N = 12 and L = 6, consisting of rows and columns such that the number of 1 in a row represents the weight w r = 6 and the number of 1 in a column represent the weight w c = 3, is illustrated below: The Tanner graph [9] of this LDPC code includes the variable nodes ri with 1≤ i ≤12 and the parity nodes Sj with 1≤ j ≤6. S 1 = r 1 ⊕ r 2 ⊕ r 4 ⊕ r 9 ⊕ r 10 ⊕ r 12 S 2 = r 1 ⊕ r 2 ⊕ r 3 ⊕ r 4 ⊕ r 5 ⊕ r 8 S 3 = r 1 ⊕ r 3 ⊕ r 5 ⊕ r 6 ⊕ r 10 ⊕ r 11 S 4 = r 4 ⊕ r 5 ⊕ r 6 ⊕ r 7 ⊕ r 9 ⊕ r 11 S 5 = r 2 ⊕ r 3 ⊕ r 7 ⊕ r 8 ⊕ r 11 ⊕ r 12 S 6 = r 6 ⊕ r 7 ⊕ r 8 ⊕ r 9 ⊕ r 10 ⊕ r 12 Suppose we receive the vector r in the form: According to the bit flipping decoding algorithm, he has to calculate the syndrome: This means that the received vector is in error. So, we will determine for each of the N = 12 bits the number of parity equations in error: i.e. if we have S = 010111 = S 1 S 2 S 3 S 4 S 5 S 6 therefore the error parity equations are S 2 , S 4 , S 5 and S 6 .
This node variable r 1 exists only in the parity node S 2 who is in error, so f 1 = 1. On the other hand, r 2 exists in the two nodes S 2 and S 5 which have different from zero, so f 2 = 2. in the same way for the other cases, we find all the f i compatible with the ri such that i integer between 1 and 12: Note that max {f i : 1≤ i ≤12}={f 7 , f 8 }. The set S of the received bits leading to a maximum of erroneous parity equations is: S = {r 7 , r 8 } it is more likely that the received bits r 7 and r 8 have been changed on the transmission channel: The syndrome S is calculated another time and the number of parity equations in error is sought for each of the N bits received.
And the maximum parity equation in error S = {r 7 , r 8 , r 12 }.
So, I'm going to toggle the bits r 7 , r 8 and r 12 the vector r becomes: r= [100001101001] And one calculates the syndrome S= [110100]: this one being always different from zero, one carries out a third iteration: We only switch the fourth bit of the received vector: And the calculation of the syndrome gives A S a result, we did not achieve our goal because the syndrome is different from zero.
In this case, a fourth iteration of the bit flipping algorithm is performed. The errors in the parity equations for each received bit are this time: the calculation of the syndrome is null = [000000]. So the vector is now valid, which can be decoded into a message.

The Steps of This Algorithm
The conception of our article is based in particular on the transfer of the equations of parity to a table, which will give directly the nodes of variable which one has to alter to find a null syndrome without doing several iterations. This table is characterized by three blocks and each of them has a specific function. STEP 1: (P1) only consists of parity check equations. STEP 2: (P2) includes a significant number of possibility of the syndrome that we can correct with 0 iteration. The column [pp.s] which represents a clean syndrome facilitates the search on the nodes of variables which must be modified to find the null syndrome without doing several iterations.
Step 3: (P 3 ) in this part, we introduce the notion of syndrome proper of the second part in order to find the rest of the probable syndromes; it suffices to add the syndrome proper of the second part. by using the following expression: S i ⊕ S i equals 0 and S i ⊕ S j different from 0. Code (7,3) 3.2.1. LDPC Code of the Dimension (7, 3) We are working here on messages composed of binary digits. The transmitted messages therefore consist of strings of 0 and 1.

The Proposed Table of a Dimension
Parity check matrix of the dimension (7, 3) = �

0101110 0010111
� For the first step, we calculate the syndrome S of the received code word r such as S= T .  If S= T =0, i.e. syndrome is null then the received code word is correct, therefore terminate the algorithm, decoding it with the corresponding message.  If S= T ≠ 0, the syndrome is different from zero, so the code word received is incorrect.
Then, our proposed algorithm can be determined the variable node ri that we have to toggle to find a null syndrome without iteration. we consider the message received after the transmission channel is written in the form is r= r 1 r 2 r 3 r 4 r 5 r 6 r 7 Where each r i is either 0 or 1. The matrix product of Hr T gives a parity check equation: S 1 = r 1 ⊕ r 4 ⊕ r 6 ⊕ r 7 S 2 = r 2 ⊕ r 4 ⊕ r 5 ⊕ r 6 S 3 = r 3 ⊕ r 5 ⊕ r 6 ⊕ r 7 In the P 1 part, the components of the syndromes S according to the nodes of variables.
In the P 2 part, there are 2 3 -1 possible syndromes.
The symbol x in the P 2 part represents the ri that must be to toggle to find a null syndrome.

Reading the Proposed Table
Example 1: Explanation of the proper syndrome: In column six (i.e. column r 5) , the case between line S 1 and column r 5 (part 1) is empty, but between line S 2 and column r 5 (part 1), there is an X symbol and between line S 3 and column r 5 (part 1) there is also an X symbol, which gives the following expression S 2 S 3 (proper syndrome in part 2), which is represented in binary by 011(column 1 part 2).
Example 2: Supposing after the calculation of Hr T , we find the syndrome 011 which, according to the Proposed Algorithm, is equivalent to S 2 S 3 . In this case we only need to toggle r 5 to get the null syndrome.
If r 5 = 1 will be changed to 0 If r 5 = 0 will be changed to 1. More explanation regarding reading this table:  The first part (P1) represents parity check equation S 1 , S 2 and S 3 the X symbol represents the r i forming the Si  The second part (P2) represents a large number of possible syndromes, from this block we can determine without calculation the variable node ri (= 1 or 0) that must be returned to have the syndrome that corresponds to zero.  The third part (P3) represents the rest of the possible syndromes, and is calculated by exploiting the new notion of own syndromes in Part 2 (P2).  If S=Hr T ≠0, the non-zero syndrome, therefore the code word received is incorrect.

The Proposed
The proposed algorithm able to determine the variable nodes ri which must be modified to find a null syndrome.

Illustrative Example
If the matrix product of Hr T gave for example, the syndrome 0111, which is equivalent to the specific syndrome S 2 S 3 S 4 of the proposed algorithm, we will look in part (2) of the table on the compatible syndromes to add them up, to find the syndromes of parity (3), then alter the suitable variable nodes, to find the null syndrome.
The proposed algorithm uses the addition of proper syndrome as follows: S 2 S 3 ⊕ S 4 =S 2 S 3 S 4 we are forced to toggle r 1 (case of S 2 S 3 ) and r 9 (case of S 4 ) or S 2 ⊕S 3 ⊕S 4 = S 2 S 3 S 4 we are forced to toggle r 7 (case of S 2 ), r 8 ( case of S 3 ) and r 9 ( case of S 4 ) or S 2 S 4 ⊕ S 3 = S 2 S 3 S 4, we are forced to toggle r 4 (case of S 2 S 4 ) and r 8 ( case of S 3 ).

The Simulation of the Proposed
Algorithm by the Quartus Software Tool 4.1. Algorithm Proposed of LDPC Code (7,3)

Simulation of LDPC (7, 3) Code after Correction
On reception, the decoder receives the different code words after the transmission channel. The hardware description language (VHDL) VHSIC which will calculate various possible cases of syndromes based on the equation S = Hr T . Such as S=S 1 S 2 S 3 and r = r 1 r 2 r 3 r 4 r 5 r 6 r 7 132 Performance Study and Synthesis of the New LDPC Error Correcting Code Using the Bit-Flipping Algorithm 4.1.2. The Simulation Result after the Correction of the Errors of LDPC (7, 3) Figure 2 shows that the syndrome has become zero, regardless of the received code word values, which implies the performance and reliability of this error correction algorithm.  The figure below shows for the different values of r i with 1≤ i ≤9, we always find a null syndrome (i.e. S 1 S 2 S 3 S 4 =0000).

Comparison of Algorithms
The proposed algorithm of bit flipping decoding has made it possible to minimize the number of iterations compared to the basic algorithm. if we take for example the LDPC code (12,6), the number of possible syndromes which we can find is 2 6 − 1 and for each syndrome different from zero, we can do almost four iterations to correct the errors, which gives 4 × (2 6 − 1) iterations in totality. On the other hand, the proposed algorithm, it removes the iteration for twelve syndromes and reduces iterations for the rest of the cases from 4 to 2 iterations.  (2) 2 5 -1 possible syndrome. the number of iterations to correct indeterminate errors LDPC (12,6) Part 2: correction without iteration. Part 3 : it suffices to add two proper syndrome of the part (2) 2 6 -1 possible syndromes. 4 possible iterations of a single case. LDPC (n, k) Part 2: correction of k code word received without iteration. Part 3 : it suffices to add two proper syndrome of the part (2) the total number of iteration of indefinite code words


The bit flipping decoding algorithm proposed in this article is based on the design of minimizing iteration according to the new concept of proper syndrome. The distribution of the equation of parity in a table facilitates the access to the nodes of variables which it is necessary to toggle to find a null syndrome.  The bit flipping decoding algorithm of a proposed LDPC code also allows us to completely eliminate and eliminate basic decoding iteration. Particularly with respect to a number n of the syndrome, such as n the length of the matrix of parity H.  The block P 2 in our proposed table directly gives the variable nodes ri that we must return to find a null syndrome. The block P 3 , just add two proper syndromes to correct the errors.

Perspectives
The proposed algorithm can be improved in future work by implementation on the FPGA, Digital Video Broadcasting-Second Generation (DVB-S2).