Universal Journal of Electrical and Electronic Engineering Vol. 7(2), pp. 127 - 135
DOI: 10.13189/ujeee.2020.070208
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Performance Study and Synthesis of the New LDPC Error Correcting Code Using the Bit-Flipping Algorithm


Lagrini Lakbir 1,*, El Habti Idrissi Anas 2, Moulay Brahim Sedra 1
1 Laboratory of Engineering Sciences and Modeling, Faculty of Sciences, University Ibn Tofail Kenitra, Morocco
2 Laboratory of Electrical Engineering and Energy System, Faculty of Sciences, University Ibn Tofail Kenitra, Morocco

ABSTRACT

The discovery in 1993 of the turbo codes Berrou C., A. and P. Glavieux Thitimajshima at the International Conférence of Communication Florida has revolutionized communication. This innovation made it possible to rediscovery the error correcting codes invented by Robert Gallager in 1963 and rediscovered by Mackay in 1995, currently called Low Density Parity Check (LDPC). This code is one of the error correction codes introduced by the transmission channel that have the fastest and most effective level of protection and correction of the information transmitted during the communication. This code has been almost generalized in communication standards such as satellites. The objective of our article is to minimize the number of iterations and in some cases completely remove the iteration produced by the LDPC code bit flipping algorithm. The result of this algorithm, if we take for example the LDPC code (n, k), the number of possible syndromes which we can find is 2k-1 and for each syndrome different from zero, we can do almost four iterations to correct the errors, which gives 4x(2k-1) iterations in totality. On the other hand, the proposed algorithm removes the iteration for k syndromes and reduces iterations for the rest of the cases from four to two iterations. This study of the new design gave more performance results and the results of the simulation below according to a hardware description language used in digital electronics using quartus software tools show the importance of this algorithm.

KEYWORDS
LDPC, VHDL, Bit-Flipping Algorithm

Cite This Paper in IEEE or APA Citation Styles
(a). IEEE Format:
[1] Lagrini Lakbir , El Habti Idrissi Anas , Moulay Brahim Sedra , "Performance Study and Synthesis of the New LDPC Error Correcting Code Using the Bit-Flipping Algorithm," Universal Journal of Electrical and Electronic Engineering, Vol. 7, No. 2, pp. 127 - 135, 2020. DOI: 10.13189/ujeee.2020.070208.

(b). APA Format:
Lagrini Lakbir , El Habti Idrissi Anas , Moulay Brahim Sedra (2020). Performance Study and Synthesis of the New LDPC Error Correcting Code Using the Bit-Flipping Algorithm. Universal Journal of Electrical and Electronic Engineering, 7(2), 127 - 135. DOI: 10.13189/ujeee.2020.070208.